Digital Design Engineer

Redmond, WA 98052

Posted: 02/27/2023 Job Number: 37046

Job Description

Pay range is $99 - $108 per hour with full benefits available, including paid time off, medical/dental/vision/life insurance, 401K, parental leave, and more. Our compensation reflects the cost of labor across several US geographic markets. Pay is based on several factors including market location and may vary depending on job-related knowledge, skills, and experience.

At Crystal Equation, we empower people and advance technology initiatives by building trust.  Your recruiter will prep you for the interview, obtain feedback, guide you through any necessary paperwork and provide everything you need for a successful start.  We will serve to empower you along the way and provide the path for your professional journey

Digital Design Engineer
Target Level: Senior

Key Responsibilities:
  • Implement design/testbench in SystemVerilog
  • Integrate IP blocks into larger SoC environment
  • Design block-level microarchitectures
  • Support the entire chip life from design/implement/verification/bringup/validation
Minimum Qualifications:
  • BS Electrical Engineering or Computer Engineering
  • 5+ years of experience as a digital design engineer using Verilog/SystemVerilog
  • Experience in microarchitecture development
  • Experience with on-chip bus protocols (AXI, AXI-Lite etc.)
  • Experience with simulation tools like VCS/Verdi/Questa
  • Experience in multi-clock-domain designs
  • Experience with JTAG interface
  • Familiarity with Linux environment (bash scripting)
  • Experience in Python3
Preferred Qualifications:
  • Experience in FPGA
  • Experience integrating with interfaces like PCIe, DDR4, MIPI
  • Experience with UVM
  • Experience in SoC integration and ASIC design
  • Experience with DFT

Meet Your Recruiter

Mischa Mohamed

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