Crystal Equation
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Silicon DV Engineer V
9845 Willows Road Redmond, WA 98052 US
Posted: 02/27/2023
2023-02-27
2023-04-27
Job Number: 37047
Job Description
Pay range is $99 - $117 per hour with full benefits available, including paid time off, medical/dental/vision/life insurance, 401K, parental leave, and more. Our compensation reflects the cost of labor across several US geographic markets. Pay is based on several factors including market location and may vary depending on job-related knowledge, skills, and experience.
THE PROMISES WE MAKE:
At Crystal Equation, we empower people and advance technology initiatives by building trust. Your recruiter will prep you for the interview, obtain feedback, guide you through any necessary paperwork and provide everything you need for a successful start. We will serve to empower you along the way and provide the path for your professional journey
Silicon DV Engineer V
Key Responsibilities
THE PROMISES WE MAKE:
At Crystal Equation, we empower people and advance technology initiatives by building trust. Your recruiter will prep you for the interview, obtain feedback, guide you through any necessary paperwork and provide everything you need for a successful start. We will serve to empower you along the way and provide the path for your professional journey
Silicon DV Engineer V
Key Responsibilities
- Writing UVM tests to check functionality of accelerator subsystems
- Writing tests to verify interprocessor communication
- Writing tests to verify dataflow between subsystems and memories
- Developing a flexible verification framework for a large IP subsystem
- BSEE/MSEE/BSCompE/MSCompE with 3 years of industry experience
- 7+ years of UVM experience (so this implies 7+ years of SystemVerilog as well)
- Deep understanding of coverage, constrained-random, transaction level modeling
- Experience with Verdi/VCS
- Experience with test plan documentation
- Experience with AMBA (AXI/APB)
- Experience with VIP
- Familiarity with Python3/Bash/Tcl scripting
- Experience with debugging simulation failures to guide digital design
- Quick learner, detail oriented and holistic problem solving skills
- Strong communication skills
- BSEE/MSEE/BSCompE/MSCompE with 10 years of industry experience
- Experience with using Hierarchical Verification Plan is a plus.
- Experience with DPI/VPI
- Experienced with a full ASIC/SoC tapeout from beginning to end
- Experience writing C code